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Espressif Systems /ESP32-S2 /SYSTEM /PERIP_RST_EN1

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Interpret as PERIP_RST_EN1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CRYPTO_AES_RST)CRYPTO_AES_RST 0 (CRYPTO_SHA_RST)CRYPTO_SHA_RST 0 (CRYPTO_RSA_RST)CRYPTO_RSA_RST 0 (CRYPTO_DS_RST)CRYPTO_DS_RST 0 (CRYPTO_HMAC_RST)CRYPTO_HMAC_RST 0 (CRYPTO_DMA_RST)CRYPTO_DMA_RST

Description

System peripheral (hardware accelerators) reset register 1

Fields

CRYPTO_AES_RST

Set this bit to reset cryptography AES.
CRYPTO_SHA_RST

Set this bit to reset cryptography SHA.
CRYPTO_RSA_RST

Set this bit to reset cryptography RSA.
CRYPTO_DS_RST

Set this bit to reset cryptography digital signature.
CRYPTO_HMAC_RST

Set this bit to reset cryptography HMAC.
CRYPTO_DMA_RST

Set this bit to reset cryptography DMA.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/espressif/svd